Rapid manufacturing of low-noise membranes for nanopore sensors by trans-chip illumination lithography.

PMID 23103750


In recent years, the concept of nanopore sensing has matured from a proof-of-principle method to a widespread, versatile technique for the study of biomolecular properties and interactions. While traditional nanopore devices based on a nanopore in a single layer membrane supported on a silicon chip can be rapidly fabricated using standard microfabrication methods, chips with additional insulating layers beyond the membrane region can provide significantly lower noise levels, but at the expense of requiring more costly and time-consuming fabrication steps. Here we present a novel fabrication protocol that overcomes this issue by enabling rapid and reproducible manufacturing of low-noise membranes for nanopore experiments. The fabrication protocol, termed trans-chip illumination lithography, is based on illuminating a membrane-containing wafer from its backside such that a photoresist (applied on the wafer's top side) is exposed exclusively in the membrane regions. Trans-chip illumination lithography permits the local modification of membrane regions and hence the fabrication of nanopore chips containing locally patterned insulating layers. This is achieved while maintaining a well-defined area containing a single thin membrane for nanopore drilling. The trans-chip illumination lithography method achieves this without relying on separate masks, thereby eliminating time-consuming alignment steps as well as the need for a mask aligner. Using the presented approach, we demonstrate rapid and reproducible fabrication of nanopore chips that contain small (12 μm × 12 μm) free-standing silicon nitride membranes surrounded by insulating layers. The electrical noise characteristics of these nanopore chips are shown to be superior to those of simpler designs without insulating layers and comparable in quality to more complex designs that are more challenging to fabricate.